The present invention relates to a radio circuit comprising a receiver, a transmitter and a VCO, preferably arranged in a mobile terminal.
In a radio ASIC there is a need for a stable frequency to move information up and down in frequency. This stable frequency is normally generated by locking an unstable VCO to a very stable reference frequency, e.g. 13 MHz, using a PLL (Phase Locked Loop)-circuit. In FIG. 1 a PLL-circuit is disclosed containing a phase detector 150, a filterandamplifier 160, a VCO and a divider with e.g. a dividing factor of 72. The PLL strives for maintaining the same signal frequencies at the inputs I, II of the phase detector. If for example the signal at input I of the phase detector has a reference frequency of 13 MHz (13 MHz-clock in the telephone) the other input II of the phase detector 150 strives for having the same frequency. This means that the VCO must run at a frequency of 72 multiplied by 13 MHZ equals 936 MHz, since the divider divides the signal from the VCO by a factor 72. Thus, the output signal III of the VCO is a very stable 936 MHz-signal, which could be used in the GSM-band.
As mobile terminals constantly decrease in size, more and more components have to be integrated on the same ASIC (Application Specific Integrated Circuit). The integration of the VCO on the ASIC will cover a major part of the ASIC area, and since the area cost is the main part of the total ASIC cost it is important to minimise it. It should be realised that up to now the inductor in the resonator circuit of the VCO has always been implemented outside the ASIC-circuit since it was not possible to make sufficiently good inductors on the chip. Thus, the invention deals with a new inventive area, i.e. how to implement the whole VCO including the inductor of the resonator inside the ASIC-circuit. However, the main object of the present invention is to decrease the number of VCO:s in order to occupy less space on the ASIC.
The above object is achieved by means of a radio circuit including a VCO connected to a radio receiver for down converting the frequency of a received signal, when the radio circuit is in a receiving mode, and to a radio transmitter for transmitting another signal when the radio circuit is in a transmitting mode.
Instead of using two different VCO:s, one for the receiver and another for the transmitter, we now use only one VCO for both the transmitter and the receiver, which of course implies that we save a lot of valuable ASIC area and costs.
In preferable embodiments of the invention, a divider with a dividing factor of two is arranged between the VCO and a mixer in the receiver for dividing the signal from the VCO with a factor two. The divider automatically generates the inphase signal and the quadrature signal eliminating the need of a phase shifter.
In a further preferable embodiment of the invention, the receiver is a homodyne receiver.
In another advantageous embodiment, the VCO is oscillating on double GSM-frequencies.
In an embodiment of the invention, the power of the divider is much smaller than the power of the VCO implying that only a small part of the 900 MHz signal is connected (i.e., inductively, capacitively) back to the receiver.
In another embodiment, the VCO used is run at 1850-1920 MHz.
The radio circuit is preferably a radio ASIC. This radio ASIC could of course be implemented in an arbitrary electrical machine, but it should be realized that the preferable electrical machine is a mobile terminal/telephone.